1. Field of the Invention
The present invention relates to a display device having light emitting elements, and a driving method thereof.
2. Description of the Related Art
In recent years, a flat panel display device which is widely used for a display portion of a portable information terminal as well as a medium-size or a large-size display device is shifting in its driving method from a passive matrix method to the main stream of an active matrix method in which writing of video signals to pixels are carried out rapidly, in accordance with the increase in the number of pixels with the higher resolution.
According to the active matrix method, there are a dot sequential drive in which pixels are sequentially driven on a dot-by-dot basis and a line sequential drive in which pixels are driven on a line-by-line basis. Circuit configurations of the both are shown in FIGS. 5A and 5B.
FIG. 5A shows an example of a circuit configuration of an active matrix type display device using a dot sequential drive. Around a pixel portion 501, a source signal line driver circuit 502 including a shift register 504, a sampling switch 505 and a level shifting buffer 506, and a gate signal line driver circuit 503 including a shift register 507 and a level shifting buffer 508 are disposed.
The shift register 507 outputs a row selection pulse in accordance with a clock pulse (GCK) and a start pulse (GSP) from the first stage in sequence. The outputted pulse undergoes an amplitude modulation and the like in the level shifting buffer 508, whereby gate signal lines are selected from the first row in sequence.
In the rows where gate signal lines are selected, the shift register 504 outputs a sampling pulse in accordance with a clock signal (SCK) and a start pulse (SSP) from the first stage in sequence. The sampling switch 505 samples a video signal (Video) in accordance with a timing at which the sampling pulse is inputted, and charges or discharges source signal lines.
The above operation is performed from the first row to the last row in sequence, thus writing for one frame is completed. A similar operation is repeated thereafter to display images.
FIG. 5B shows an example of a circuit configuration of an active matrix display device using a line sequential drive. Around a pixel portion 511, a source signal line driver circuit 512 including a shift register 514, a first latch circuit 515, a second latch circuit 516 and a level shifting buffer 517, and a gate signal line driver circuit 513 including a shift register 518 and a level shifting buffer 519 are disposed.
The shift register 518 outputs a row selection pulse in accordance with a clock pulse (GCK) and a start pulse (GSP) from the first stage in sequence. The outputted pulse undergoes an amplitude modulation and the like in the level shifting buffer 519, whereby gate signal lines are selected from the first row in sequence.
In the rows where gate signal lines are selected, the shift register 514 outputs a sampling pulse in accordance with a clock signal (SCK) and a start pulse (SSP) from the first stage in sequence. The first latch circuit 515 samples a video signal in accordance with a timing at which the sampling pulse is inputted, and the video signal that is sampled on each stage is held in the first latch circuit 515.
After video signals for one row are sampled and a latch pulse (LAT) is inputted, the video signals held in the first latch circuit 515 are transferred to the second latch circuit 516 all at once, whereby all the source signal lines are charged or discharged at a time.
The above operation is performed from the first row to the last row in sequence, thus writing for one frame is completed. A similar operation is repeated thereafter to display images.
According to the dot sequential drive shown in FIG. 5A, circuit configuration is relatively simple, which leads to small-scale driver circuits while it takes a long time to charge and discharge one source signal line. On the other hand, according to the line sequential drive shown in FIG. 5B, circuit configuration is relatively complex, which leads to large-scale driver circuits. However, as the charge and discharge for all the source signal lines are performed in parallel, writing can be performed with a sufficient time.